A conventional process for forming LSI wiring is as follows. Firstly, an interlayer dielectric film is formed on a Si substrate. Then, a dielectric film and a cap dielectric film are deposited thereon as inter-wiring dielectric films, and trenches for forming wiring lines are formed in these inter-wiring dielectric films. Thereafter, the wiring trenches are filled with a barrier metal and a wiring material, and these fillings are processed by chemical mechanical polishing (CMP). Thereafter, a Cu diffusion prevention film is formed thereon, and thus Cu wirings each having a single layer are formed.
However, in this structure, a sidewall of the wiring material directly contacts the inter-wiring dielectric films, and thus moisture in the dielectric films may cause wiring metal corrosion. In particular, if the inter-wiring dielectric films are damaged during etching for forming the trenches, wiring metal corrosion is likely to be more serious. Meanwhile, a structure in which CuSiN cap films are formed on a top surface of the Cu wirings has been proposed. However, this structure cannot suppress wiring metal corrosion caused by moisture in the inter-wiring dielectric films.